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> <channel><title>Comments for One Man&#039;s Trash is Another Man&#039;s Blog</title> <atom:link href="http://www.blueraja.com/blog/comments/feed" rel="self" type="application/rss+xml" /><link>http://www.blueraja.com/blog</link> <description>Just another WordPress site</description> <lastBuildDate>Tue, 24 Jan 2012 06:52:21 +0000</lastBuildDate> <sy:updatePeriod>hourly</sy:updatePeriod> <sy:updateFrequency>1</sy:updateFrequency> <generator>http://wordpress.org/?v=3.3.1</generator> <item><title>Comment on Making Use of Spare Hard-Drives by BlueRaja</title><link>http://www.blueraja.com/blog/170/making-use-of-spare-hard-drives#comment-1319</link> <dc:creator>BlueRaja</dc:creator> <pubDate>Tue, 24 Jan 2012 06:52:21 +0000</pubDate> <guid
isPermaLink="false">http://www.blueraja.com/blog2/?p=170#comment-1319</guid> <description>Yep, pretty much every hard-drive ever has them (but not SSD&#039;s)!</description> <content:encoded><![CDATA[<p>Yep, pretty much every hard-drive ever has them (but not SSD&#8217;s)!</p> ]]></content:encoded> </item> <item><title>Comment on Making Use of Spare Hard-Drives by Jyo</title><link>http://www.blueraja.com/blog/170/making-use-of-spare-hard-drives#comment-1318</link> <dc:creator>Jyo</dc:creator> <pubDate>Tue, 24 Jan 2012 05:07:55 +0000</pubDate> <guid
isPermaLink="false">http://www.blueraja.com/blog2/?p=170#comment-1318</guid> <description>Are neodynium magnets found in every hard drive? These magnets can be used in many fun experiments.</description> <content:encoded><![CDATA[<p>Are neodynium magnets found in every hard drive? These magnets can be used in many fun experiments.</p> ]]></content:encoded> </item> <item><title>Comment on About by Alex</title><link>http://www.blueraja.com/blog/about#comment-727</link> <dc:creator>Alex</dc:creator> <pubDate>Mon, 24 Oct 2011 15:22:08 +0000</pubDate> <guid
isPermaLink="false">http://www.blueraja.com/blog2/?page_id=2#comment-727</guid> <description>Hello BlueRaja,i read on superuser.com that you convert chrome or FF-addons to IE Extensions. I have build a Chrome and FF-Addon for my site but can&#039;t code IE Extensions. So i wanted to know if you are interessted in this.For further informations simple write me a mail.cheers Alex</description> <content:encoded><![CDATA[<p>Hello BlueRaja,</p><p>i read on superuser.com that you convert chrome or FF-addons to IE Extensions. I have build a Chrome and FF-Addon for my site but can&#8217;t code IE Extensions. So i wanted to know if you are interessted in this.</p><p>For further informations simple write me a mail.</p><p>cheers Alex</p> ]]></content:encoded> </item> <item><title>Comment on Branchless Conditionals (Compiler Optimization Technique) by Zhi Wen</title><link>http://www.blueraja.com/blog/285/branchless-conditionals-compiler-optimization-technique#comment-563</link> <dc:creator>Zhi Wen</dc:creator> <pubDate>Sun, 11 Sep 2011 09:40:48 +0000</pubDate> <guid
isPermaLink="false">http://www.blueraja.com/blog/?p=285#comment-563</guid> <description>so, how do they create such smart compiler?  Do they have some kind of special tools to help them?</description> <content:encoded><![CDATA[<p>so, how do they create such smart compiler?  Do they have some kind of special tools to help them?</p> ]]></content:encoded> </item> <item><title>Comment on Branchless Conditionals (Compiler Optimization Technique) by BlueRaja</title><link>http://www.blueraja.com/blog/285/branchless-conditionals-compiler-optimization-technique#comment-298</link> <dc:creator>BlueRaja</dc:creator> <pubDate>Fri, 17 Jun 2011 17:39:01 +0000</pubDate> <guid
isPermaLink="false">http://www.blueraja.com/blog/?p=285#comment-298</guid> <description>@Roy:  Perhaps I spoke too tongue-in-cheek.  What you are thinking of is called &quot;speculative execution.&quot;  It is a common optimization technique in superscalar architectures, but it is not their primary purpose.The idea behind superscalar architectures is simple:  allow the CPU to fetch/decode/execute multiple instructions at once.  They *could* do this by having multiple separate pipelines, but usually they do not; instead, the processor has multiple fetch/decode units, with multiple specialized execution units shared between them.I say &quot;specialized&quot; because each execution unit can only run some specific instructions:  there is one (or more) for integer arithmetic (ALU), one+ for floating-point arithmetic (FPU), one+ for &#039;jmp&#039; instructions (branch unit), etc. etc.  The reason they do this is to remove unnecessary hardware (which takes up space, money, and generates more heat) - and since there are rarely, for instance, 10 unrelated arithmetic expressions in a row, there is no point in having 10 full execution units capable of doing arithmetic when only three will be doing arithmetic at any one time.Notice I said &quot;unrelated&quot; arithmetic expressions - because the CPU is *literally* executing multiple instructions at a time, it has to be certain that the results from one instruction don&#039;t rely on the results of another instruction it&#039;s currently in the process of executing.  How it does this &quot;dependency checking&quot; is a complicated topic (which is to say, I don&#039;t know :) ), but suffice it to say that even the CPU cannot do a perfect job of determining which future instructions it can execute now, and which it has to buffer until other instructions are done.This is why compilers do instruction reordering/interleaving (moving assembly instructions around so that the final result is the same, but painfully difficult for humans to read):  to help the superscalar processor dispatch as many instructions as possible each cycle.  And that, in turn, is part of the reason it&#039;s so difficult for humans nowadays to write hand-written assembly that is faster than the compiler&#039;s - you have to be intimately familiar with how the processor will dispatch your instructions to each of its execution units.I hope this small essay helped clear up some of the confusion :)</description> <content:encoded><![CDATA[<p>@Roy:  Perhaps I spoke too tongue-in-cheek.  What you are thinking of is called &#8220;speculative execution.&#8221;  It is a common optimization technique in superscalar architectures, but it is not their primary purpose.</p><p>The idea behind superscalar architectures is simple:  allow the CPU to fetch/decode/execute multiple instructions at once.  They *could* do this by having multiple separate pipelines, but usually they do not; instead, the processor has multiple fetch/decode units, with multiple specialized execution units shared between them.</p><p>I say &#8220;specialized&#8221; because each execution unit can only run some specific instructions:  there is one (or more) for integer arithmetic (ALU), one+ for floating-point arithmetic (FPU), one+ for &#8216;jmp&#8217; instructions (branch unit), etc. etc.  The reason they do this is to remove unnecessary hardware (which takes up space, money, and generates more heat) &#8211; and since there are rarely, for instance, 10 unrelated arithmetic expressions in a row, there is no point in having 10 full execution units capable of doing arithmetic when only three will be doing arithmetic at any one time.</p><p>Notice I said &#8220;unrelated&#8221; arithmetic expressions &#8211; because the CPU is *literally* executing multiple instructions at a time, it has to be certain that the results from one instruction don&#8217;t rely on the results of another instruction it&#8217;s currently in the process of executing.  How it does this &#8220;dependency checking&#8221; is a complicated topic (which is to say, I don&#8217;t know <img
src='http://www.blueraja.com/blog/wp-includes/images/smilies/icon_smile.gif' alt=':)' class='wp-smiley' /> ), but suffice it to say that even the CPU cannot do a perfect job of determining which future instructions it can execute now, and which it has to buffer until other instructions are done.</p><p>This is why compilers do instruction reordering/interleaving (moving assembly instructions around so that the final result is the same, but painfully difficult for humans to read):  to help the superscalar processor dispatch as many instructions as possible each cycle.  And that, in turn, is part of the reason it&#8217;s so difficult for humans nowadays to write hand-written assembly that is faster than the compiler&#8217;s &#8211; you have to be intimately familiar with how the processor will dispatch your instructions to each of its execution units.</p><p>I hope this small essay helped clear up some of the confusion <img
src='http://www.blueraja.com/blog/wp-includes/images/smilies/icon_smile.gif' alt=':)' class='wp-smiley' /></p> ]]></content:encoded> </item> <item><title>Comment on Branchless Conditionals (Compiler Optimization Technique) by Roy Triesscheijn</title><link>http://www.blueraja.com/blog/285/branchless-conditionals-compiler-optimization-technique#comment-297</link> <dc:creator>Roy Triesscheijn</dc:creator> <pubDate>Fri, 17 Jun 2011 15:57:46 +0000</pubDate> <guid
isPermaLink="false">http://www.blueraja.com/blog/?p=285#comment-297</guid> <description>Hey, very interesting read, however I didn&#039;t get this part:&quot;... modern CPUs essentially have multiple pipelines, meaning they literally execute more than one instruction at once, even if ... When a conditional-jump prediction fails, all these pipelines must be flushed and stalled, so all the pipelines sit around doing nothing when the conditional-jump executes&quot;Isn&#039;t the idea of a superscalar structure that when a compare happens both parts are calculated and the pipe that guessed wrong is flushed and the other pipe&#039;s answer is used?</description> <content:encoded><![CDATA[<p>Hey, very interesting read, however I didn&#8217;t get this part:</p><p>&#8220;&#8230; modern CPUs essentially have multiple pipelines, meaning they literally execute more than one instruction at once, even if &#8230; When a conditional-jump prediction fails, all these pipelines must be flushed and stalled, so all the pipelines sit around doing nothing when the conditional-jump executes&#8221;</p><p>Isn&#8217;t the idea of a superscalar structure that when a compare happens both parts are calculated and the pipe that guessed wrong is flushed and the other pipe&#8217;s answer is used?</p> ]]></content:encoded> </item> <item><title>Comment on Branchless Conditionals (Compiler Optimization Technique) by Jack</title><link>http://www.blueraja.com/blog/285/branchless-conditionals-compiler-optimization-technique#comment-256</link> <dc:creator>Jack</dc:creator> <pubDate>Tue, 07 Jun 2011 04:39:14 +0000</pubDate> <guid
isPermaLink="false">http://www.blueraja.com/blog/?p=285#comment-256</guid> <description>A thoroughly interesting read....however:
Are you sure the claim of throughput gains are valid when the optimized sequence of instructions almost certainly need data forwarding? Have you confirmed the results with test cases?</description> <content:encoded><![CDATA[<p>A thoroughly interesting read&#8230;.however:<br
/> Are you sure the claim of throughput gains are valid when the optimized sequence of instructions almost certainly need data forwarding? Have you confirmed the results with test cases?</p> ]]></content:encoded> </item> <item><title>Comment on Branchless Conditionals (Compiler Optimization Technique) by Joe</title><link>http://www.blueraja.com/blog/285/branchless-conditionals-compiler-optimization-technique#comment-243</link> <dc:creator>Joe</dc:creator> <pubDate>Mon, 16 May 2011 16:07:37 +0000</pubDate> <guid
isPermaLink="false">http://www.blueraja.com/blog/?p=285#comment-243</guid> <description>Well that was a fun and informative read. Now I feel like I could program a space shuttle to orbit the moon.Would love a part two... ;)</description> <content:encoded><![CDATA[<p>Well that was a fun and informative read. Now I feel like I could program a space shuttle to orbit the moon.Would love a part two&#8230; <img
src='http://www.blueraja.com/blog/wp-includes/images/smilies/icon_wink.gif' alt=';)' class='wp-smiley' /></p> ]]></content:encoded> </item> <item><title>Comment on Branchless Conditionals (Compiler Optimization Technique) by golb</title><link>http://www.blueraja.com/blog/285/branchless-conditionals-compiler-optimization-technique#comment-220</link> <dc:creator>golb</dc:creator> <pubDate>Tue, 10 May 2011 16:40:30 +0000</pubDate> <guid
isPermaLink="false">http://www.blueraja.com/blog/?p=285#comment-220</guid> <description>[...] First new blog post in over a year: http://www.blueraja.com/blog/285/branchless-conditionals-compiler-optimization-technique [...]</description> <content:encoded><![CDATA[<p>[...] First new blog post in over a year: <a
href="http://www.blueraja.com/blog/285/branchless-conditionals-compiler-optimization-technique" rel="nofollow">http://www.blueraja.com/blog/285/branchless-conditionals-compiler-optimization-technique</a> [...]</p> ]]></content:encoded> </item> <item><title>Comment on Do transformers obey Ohm&#8217;s Law? by Do transformers obey ohms law.. - Page 2</title><link>http://www.blueraja.com/blog/194/do-transformers-obey-ohms-law#comment-64</link> <dc:creator>Do transformers obey ohms law.. - Page 2</dc:creator> <pubDate>Fri, 29 Apr 2011 18:36:22 +0000</pubDate> <guid
isPermaLink="false">http://www.blueraja.com/blog2/?p=194#comment-64</guid> <description>[...] Do transformers obey ohms law..     I&#039;ve written a blog-post on the subject here, which should hopefully clear up some of the confusion.                Reply With Quote     View [...]</description> <content:encoded><![CDATA[<p>[...] Do transformers obey ohms law..     I&#039;ve written a blog-post on the subject here, which should hopefully clear up some of the confusion.                Reply With Quote     View [...]</p> ]]></content:encoded> </item> </channel> </rss>
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